Columbia University, Google DeepMind, and Google published research on agentic AI for automated register-transfer-level waveform analysis and chip-verification debugging.

Researchers from Columbia University, Google DeepMind, and Google published a technical paper titled “Back to the Future: Rethinking EDA Infrastructure for Agentic Systems in Chip Design Verification.” Here, EDA means electronic design automation.

Semiconductor Engineering describes the work as applying agentic AI to register-transfer-level (RTL) waveform analysis and debugging. The paper’s abstract frames the problem around increasingly complex, multi-billion-transistor systems-on-chip whose verification workflows remain heavily manual.

The reported development is a research publication, rather than a commercial verification-product launch or confirmed production deployment. The supplied excerpt does not include the agent architecture, evaluation dataset, benchmark results, debugging-success rates, or measured time savings.