Technical University of Munich researchers used neural-network transistor models to accelerate 3-nm nanosheet circuit simulation and standard-cell library characterization.

Technical University of Munich researchers published “NN-Based Transistor Modeling for Ultra-Fast SPICE Simulation and Standard Cell Library Characterization.” Semiconductor Engineering’s headline identifies the work with 3-nanometer nanosheet circuit simulation.

The approach uses neural-network-based transistor models to accelerate device modeling and circuit simulation. SPICE stands for Simulation Program with Integrated Circuit Emphasis; the paper’s stated scope also includes standard-cell library characterization.

The supplied abstract notes that earlier neural-network transistor models had demonstrated substantial simulation speedups but had not been rigorously tested in complex standard-cell-related tasks. The excerpt does not provide numerical speedup results, accuracy measurements, benchmark circuits, or computational-resource requirements, so no quantitative performance comparison can be established from it.