Cadence and University of Notre Dame researchers published an AI-accelerated iterative solver for thermal modeling of heterogeneous 2.5D/3D chip packages.

The publication focuses on package-level thermal analysis. Semiconductor Engineering reported that researchers from Cadence Design Systems and the University of Notre Dame published “A Composable AI-Accelerated Iterative Solver for 3D-IC Thermal Modeling.” The work addresses heterogeneous 2.5D and 3D integrated-circuit packages.

The abstract identifies computational cost as a central difficulty. It states that a single full-package finite-element method (FEM) simulation can take hours. It also notes that AI-based surrogate models treat an entire stack as a monolithic prediction target, although the supplied excerpt ends before completing that discussion.

The title establishes the proposed solver’s composable, iterative approach. The available material does not provide implementation details, benchmark speedups, thermal-error measurements, or supported package sizes. It documents a research publication rather than a commercial Cadence product release or measured production deployment.