ComputeLabs Research
Samsung plans to manufacture base dies for NVIDIA’s customized high-bandwidth memory (HBM) using TSMC’s 3-nanometer process.
· ComputeLabs Research · from the October 18, 2026 edition
The manufacturing arrangement is reported, not directly confirmed in the supplied primary materials. The Seoul Economic Daily, as summarized on Telegram, cited unnamed industry sources saying Samsung accepted NVIDIA’s request after an internal evaluation. The report describes this as Samsung’s first collaboration with TSMC at the HBM manufacturing stage.
The process requirement specifically concerns NVHBM base dies. NVIDIA reportedly asked Samsung, SK hynix, and Micron to use TSMC’s 3-nanometer process for those dies to standardize implementation and performance across suppliers. A separate requirement described in the reporting calls for sixth-generation dynamic random-access memory (DRAM) technology for the memory’s core chips.
NVHBM incorporates NVIDIA-specific functionality. The product, reportedly announced in August, integrates NVIDIA’s customized memory controller into the base die. Another supplied summary describes NVHBM as based on the seventh-generation HBM4E architecture; that architecture designation is separate from the DRAM-process generation mentioned for the core chips.
Samsung’s other HBM production plans remain distinct. The report says Samsung intends to retain its own production model for standard HBM and customized products for other customers. It is also evaluating whether its foundry could produce NVHBM base dies if demand exceeded TSMC’s capacity, but the sources do not establish that such production has been approved or begun.
Additional reporting
- Samsung

