Huawei’s τ-chip paper reported 55% higher density; neural processing unit and GPU power fell 66% and 58%, respectively, at equal performance.

Huawei semiconductor executive He Tingbo (何庭波) published a paper titled “Huawei’s τ Chip Was Supposed to Melt?” on the Chinese Academy of Sciences’ ChinaXiv preprint platform on September 4. The paper addressed concerns that three-dimensional chip stacking would necessarily produce greater power consumption and heat.

Using measured data from the Kirin 2026, the paper reported an approximately 55% increase in transistor density. At equivalent performance, neural processing unit power consumption fell 66%, while graphics processing unit power consumption fell 58%.

He attributed the reported results to LogicFolding, which shortens signal-transmission paths and reduces energy consumed in moving data. The paper’s argument was that greater physical density did not result in the anticipated overheating because communication and data-movement requirements were reduced.

The figures were presented as results reported in Huawei’s paper and were not described in the source as independently benchmarked. The source did not provide die size, process node, absolute wattage, workload definitions, temperature measurements, or full benchmark methodology.